Written by Ivan Rodero / Chief Innovation Officer
Filippos Perdikos / Innovation Scientist Engineer
Guillermo Talavera / Senior Scientist Engineer / Openchip / Published on March 02, 2026

In Europe, digital sovereignty is often discussed in political terms. In practice, however, it is fundamentally an engineering and industrial challenge. Modern digital systems are highly complex. Artificial intelligence, high-performance computing (HPC), cloud and edge infrastructures are built on deep technology stacks: silicon, advanced packaging, interconnect, firmware, operating systems, toolchains, runtimes, and application frameworks. When large portions of this stack are designed and controlled outside Europe, European industries depend on external roadmaps, external supply chains, and standards defined elsewhere.

This dependency is tangible. It affects procurement cycles, lead times for advanced components, the ability to customize systems for European requirements such as energy efficiency, safety, and data protection, and even the pace of innovation when access to critical IP or development tools is constrained.

In practical terms, digital sovereignty means that Europe can design, integrate, validate, and deploy critical digital systems at industrial scale. This extends beyond manufacturing
capacity. It includes design capabilities, system integration expertise, software maturity, and the ability to translate prototypes into robust industrial products.

What IPCEI changes for European microelectronics

The Important Project of Common European Interest on Microelectronics and Communication Technologies (IPCEI ME/
CT) represents a structural shift because it approaches the challenge as a value-chain transformation rather than a collection of isolated projects.

The most significant contribution of IPCEI is the integration of design, IP development, manufacturing, packaging, systems engineering, and software within a coherent industrial framework. Innovation in
microelectronics does not occur in isolation.

Performance, energy efficiency, security, and reliability emerge from co-design across hardware and software layers. IPCEI creates the conditions to operate at this level of integration at European scale. Risk sharing is another decisive element. Advanced silicon, accelerator architectures, and system platforms involve
substantial technical and financial uncertainty. Private capital alone is often insufficient, particularly in early industrial phases when markets are not yet mature. IPCEI helps bridge this gap, enabling European companies to pursue technically ambitious developments that would otherwise be difficult to justify.

Equally important is the link between innovation and first industrial deployment. Europe has historically generated strong
research outcomes, yet many fail to cross the gap between laboratory and factory. IPCEI places industrialization at the center, connecting research results with production environments and market entry.

What this means in practice for a company like Openchip

Openchip operates as a fabless, full-stack design house, developing high-performance accelerators and complete systems for AI and HPC. Our work spans silicon architecture, accelerator design, chiplet and packaging strategies, firmware and low-level software, system software and SDKs, and vertical integration into deployable platforms.

In this context, every architectural decision has system-level implications. Memory hierarchy influences compiler design. Packaging choices affect thermals and power delivery. Instruction set architecture (ISA) decisions shape toolchains and application performance. Security mechanisms must be coherently implemented from silicon to software.

IPCEI enables alignment within a European ecosystem where design houses, technology providers, research centers, and industrial users converge around concrete system objectives: performance, energy efficiency, sustainability, safety, and long-term maintainability.

It also fosters the development of European system-level expertise. Many current system architectures are optimized around platforms developed outside Europe. Building indigenous stacks requires architects
capable of understanding silicon, software, and workload behavior simultaneously. This competence becomes a strategic asset retained within Europe.

RISC-V as a practical sovereignty tool

RISC-V is frequently discussed in abstract terms. From an engineering perspective, it is a pragmatic architectural choice and provides control over the ISA roadmap, flexibility to implement domain-specific extensions, and the ability to develop European IP without structural vendor lock-in.

In accelerator and HPC environments, this flexibility is critical. It enables the design of vector units, memory subsystems, and control logic tailored to real workloads. Security features can be integrated at ISA and microarchitectural levels. The hardware–software interface can be optimized for performance per watt, not merely peak performance.

However, RISC-V alone does not guarantee sovereignty. The broader toolchain, including compilers, runtimes, debuggers, and system software, is equally essential. The value of RISC-V is realized only when hardware and software evolve in concert within a coherent full-stack strategy.

Within the IPCEI framework, investment in RISC-V-based platforms becomes part of a coordinated European industrial roadmap rather than isolated experimentation. This is what enables the emergence of sustainable products and ecosystems around open architectures.

From IPCEI to HPC

The DARE program plays a critical role in the high-performance computing domain by demonstrating how European accelerators and system components can transition from research prototypes to operational HPC deployments.

For Openchip, DARE provides a concrete validation pathway: vector accelerators, advanced system integration, and HPC
software stacks deployed within European supercomputing environments. It connects architectural innovation with real workloads and procurement cycles.

DARE is most effective when embedded within a broader industrial trajectory. IPCEI
establishes the foundational industrial capabilities, design capacity, manufacturing linkages, packaging technologies, and
system integration expertise. DARE then validates these capabilities in demanding HPC scenarios. Both layers are necessary: one builds structural capacity, the other tests it under high-performance conditions.

Why continuity of investment matters for industrial scale

In deep-tech and semiconductor industries, impact derives from continuity rather than isolated success. Hardware and
system technologies evolve across long development cycles. An initial prototype marks progress, but industrial value
emerges after multiple generations of silicon, progressively mature software stacks, large-scale validation, and integration
into customer environments. This iterative refinement is intrinsic to robust platform development.

Sustained investment allows promising technologies to mature into stable industrial products. It builds trust among users and partners and enables long-term competence accumulation. Performance, efficiency, and reliability improve most significantly across successive iterations.

Public instruments such as IPCEI provide the structural framework to connect innovation with industrial deployment. When
complemented by pilot deployments, early procurement mechanisms, and long-term industrial partnerships, advanced
technologies can evolve into scalable platforms.

Digital sovereignty is not built in a single cycle. It is constructed through consistent industrial progress over extended time
horizons.

Innovation and people: the strategic differentiator

Technology stacks can be engineered. System-level expertise must be cultivated. Europe faces a shortage of experienced
system architects capable of integrating silicon, packaging, software, and workloads within a unified design approach. Specialization is natural, but full-stack system competence emerges only through hands-on integration across disciplines.

For this reason, structured innovation programs, targeted technical certifications, industry–academia collaboration, and real-world system projects are strategic investments rather than optional initiatives. Without engineers capable of designing and integrating complete systems, sovereignty remains theoretical.

Innovation also requires a culture that tolerates technical risk and iterative refinement. The IPCEI framework supports this by distributing risk and legitimizing learning across development cycles.

Closing: what we believe Europe can still do right

We believe Europe has a real opportunity in system-level digital sovereignty. The pieces exist: strong research and engineering talent, industrial players across the value chain, open technologies like RISC-V, and instruments like IPCEI that align technology, industry, and public interest.

The challenge is execution over time. Sovereignty is not achieved by one project or one product. It is achieved by building
platforms, ecosystems, and skills that can evolve.

From our position in the innovation department, we see both the difficulty and the potential. The work is hard. Integration across hardware and software is complex. Scaling from prototype to product is slow. But this is exactly where Europe can differentiate: by building deep system competence and by aligning innovation with long-term industrial goals.

If we stay consistent, invest beyond the first success, and keep system integration at the center, Europe can build digital sovereignty in practice. Not as a slogan, but as working systems deployed at scale.