From static silicon to adaptive systems - INSIDE Industry Association

Written by Keith Shea / D-Chiplet AB / Published on June 24, 2026

For more than five decades, the semiconductor industry has advanced through a remarkably successful formula: smaller transistors, faster chips, and increasing compute density driven by Moore’s Law. Today, however, that model is approaching a fundamental inflection.

The challenge is no longer simply about producing more compute. The challenge is that the nature of computing itself has
changed. Artificial intelligence, autonomous systems, robotics, edge computing, and distributed infrastructure are creating
workloads that are dynamic, unpredictable, and evolving in real time. At the same time, energy consumption has emerged as one of the primary constraints on performance scaling. In many systems, power, not transistor density, is now the limiting factor.

This creates a growing mismatch between modern applications and the hardware architectures designed to support them.
Addressing this challenge is the mission of D-Chiplet AB. Today’s compute systems remain largely static. Hardware resources are defined at design time, optimized for fixed assumptions, and deployed as rigid configurations. Yet the workloads running on those systems increasingly require adaptability, specialization, and continuous optimization. At the same time, the compute performance and energy requirements are growing exponentially. This mismatch is helping drive a major transition in the computing industry.

Market demand has broken the traditional model
The demand signals emerging across the semiconductor and systems ecosystem are clear. AI infrastructure is scaling at unprecedented speed. Autonomous systems require real-time decision-making under dynamic conditions. Edge AI deployments must balance latency, power efficiency, thermal constraints, and intermittent connectivity. Data centers face mounting pressure to improve utilization and energy efficiency while supporting increasingly heterogeneous workloads.

In each of these domains, the industry is discovering the same limitation: static silicon struggles to efficiently support dynamic workloads. Historically, hardware systems were designed for relatively predictable operating conditions.
Performance optimization occurred during chip design and validation, long before deployment. Once a system shipped, its
hardware capabilities were largely fixed.

That model is becoming unsustainable.
Modern AI workloads vary continuously in intensity, parallelism requirements, memory behavior, and accelerator usage. In many cases, systems are over-provisioned for worst-case scenarios, leading to underutilized silicon, unnecessary energy consumption, and increasing software complexity. The market has therefore evolved beyond simply delivering higher performance. The industry increasingly requires adaptive compute, workload-aware optimization, improved performance-per-watt, and systems capable of evolving after deployment.

This shift is occurring simultaneously across automotive, aerospace, industrial automation, telecommunications, mobile devices, robotics, and cloud infrastructure. The result is a rare moment in the semiconductor industry: a structural market transition where a new architectural layer is becoming necessary.

The industry is entering a new compute paradigm
Three major technology transitions are driving this change.

AI is changing compute requirements

Artificial intelligence is fundamentally different from traditional computeworkloads.
AI systems demand high levels of parallelism, specialized acceleration, real- time optimization, and dynamic resource allocation. Workloads can shift rapidly between training, inference, sensor fusion, and decision-making operations.
This has exposed the limitations of conventional fixed-function architectures.

The industry response has been an explosion of heterogeneous compute architectures incorporating CPUs, GPUs, NPUs, FPGAs, domain-specific accelerators, and increasingly specialized AI silicon.
But while heterogeneous architectures improve capability, they also dramatically increase system complexity.

The industry is moving toward chiplet-based architectures
In parallel, the semiconductor industry is transitioning from monolithic system- on-chip (SoC) designs toward modular chiplet architectures.
Chiplets allow designers to combine best-in-class compute elements into more flexible systems. This improves manufacturing yield, accelerates innovation cycles, enables process-node optimization, and reduces development cost.
The rise of chiplets represents one of the most important architectural transitions in modern semiconductor design.
However, most chiplet systems today remain fundamentally static after deployment.
They improve modularity at design time, but not adaptability at runtime.
The next step in the evolution of compute is therefore not simply modular hardware, but adaptive hardware.

Software-defined infrastructure is expanding toward hardware
Over the last two decades, virtualization, orchestration, and cloud-native infrastructure transformed computing by abstracting physical resources into software-defined services.
Applications no longer needed to manage servers directly. Infrastructure became dynamic, scalable, and programmable.
But this transformation largely stopped at the hardware layer.
Today’s hardware still operates primarily as a fixed resource.
This creates the next major opportunity: bringing software-defined principles into the orchestration and optimization of hardware itself.
In effect, the industry is evolving from fixed systems to modular systems, and now toward adaptive systems.
That transition is now underway.

From research to reality: D-Chiplet and adaptive hardware
At Luleå University of Technology (LTU), Professors Jerker Delsing, Cristina Paniagua, and Shailesh Chouhan have spent
more than a decade researching cyber- physical systems, with particular focus on autonomous structural and functional
plasticity in cyber physical systems. This work has been supported by EC and national funding in a series of Arrowhead projects. Their pioneering work in adaptive computing and cyber-physical systems was recognized nationally when the University named the team ‘Innovators of the Year 2025’.

The technology emerging from LTU reflects deep European research excellence rooted in adaptive hardware systems, runtime orchestration, advanced systems engineering, embedded systems, and energy-efficient computing design. D-Chiplet combines these strong Swedish academic foundations with entrepreneurial and commercial experience shaped in Silicon Valley. The company brings together world-class European research with leadership experience from the global semiconductor and compute ecosystem, creating a bridge between cutting-edge

European innovation and the commercial scaling mindset often associated with Silicon Valley. Alongside the LTU research team, D-Chiplet also includes three experienced technology entrepreneurs, Daniel Hagström, Fredrik Berglund, and Keith Shea. Combined they have decades of experience building and scaling high-tech companies internationally. Daniel and Fredrik have both successfully launched more than a dozen venture-backed startups across the globe, and Keith brings
more than 20 years of experience as a former executive of Intel Corporation.

In this sense, D-Chiplet represents more than a university spinout. It represents the combination of deep Swedish technical
innovation with Silicon Valley entrepreneurial DNA. This research is now transitioning into industry through the formation of D-Chiplet AB, a company created to commercialize adaptive, software-defined hardware for heterogeneous chiplet-based systems.

D-Chiplet is building a runtime control and orchestration layer for heterogeneous chiplet- based systems. The simplest way to think about the platform is this: D-Chiplet brings a “microservices model” to silicon. Rather than relying on fixed hardware configurations, the platform enables compute resources to be dynamically orchestrated across heterogeneous hardware elements based on real-time workload requirements. At the core of the architecture is the concept of treating compute, memory, accelerators, and I/O resources as composable elements that can be dynamically assembled into functional “microsystems.”

This enables dynamic allocation of compute resources, workload-aware optimization, and adaptive balancing of performance and energy consumption. It can also support longer hardware lifecycles as workloads evolve.

Unlike traditional instruction set architectures (ISAs), which define how software interacts with fixed hardware abstractions, adaptive systems allow the hardware resources to be reorganized in response to system requirements. Unlike virtualization layers, which partition existing resources, adaptive orchestration enables hardware resources to be composed and reconfigured for changing workloads. And unlike conventional operating systems, which manage software processes, D-Chiplet introduces a runtime control plane for orchestrating hardware.

The result is a transition from static hardware building blocks toward a fluid compute fabric.

Why this matters for Europe
Beyond its technical significance, this transition carries strategic importance for Europe. As global competition intensifies across semiconductors, AI infrastructure, and digital sovereignty, Europe has a significant
opportunity to define new layers of the compute stack rather than competing solely on manufacturing scale. This creates an
opportunity for Europe not only to participate in the next era of computing, but to help define critical architectural layers within it.

Europe already possesses deep strengths in:

embedded systems,
industrial automation,
cyber-physical systems,
telecommunications,
automotive engineering,
and energy-efficient computing.

Adaptive, software-defined hardware aligns directly with these strengths. The emergence of heterogeneous chiplet ecosystems also creates new opportunities for European companies and research institutions to contribute differentiated intellectual property and system-level innovation. In this context, D-Chiplet represents more than a single technology platform. It reflects a broader transition in computing architecture, one where orchestration, adaptability, and energy efficiency become as important as raw transistor scaling. This is especially relevant as Europe seeks to strengthen its role in resilient digital infrastructure, AI competitiveness, and strategic autonomy.

Applications across strategic industries
The implications of adaptive hardware extend across multiple industries.

Automotive
Modern vehicles are evolving into software-defined platforms integrating autonomous driving, connectivity, infotainment, and safety-critical systems. Adaptive compute architectures can dynamically allocate resources based on changing operational requirements while improving energy efficiency and system longevity. For example, compute resources could be prioritized differently during highway autonomy, urban driving, charging, or diagnostic operation.

Edge AI and robotics
Edge systems operate under strict constraints on latency, thermal limits, and power consumption. Adaptive orchestration allows systems to optimize compute resources dynamically as environmental conditions change.

Telecommunications
As networks evolve toward distributed 5G and future 6G architectures, adaptive compute enables more efficient management of variable and distributed workloads. Examples include dynamic allocation of acceleration resources for baseband processing, edge inference, traffic management, or network slicing.

Data centers
Cloud infrastructure increasingly depends on heterogeneous acceleration and energy optimization. Reconfigurable hardware systems can improve utilization rates and performance-per-watt while reducing operational costs.

Aerospace and defense
Mission-critical systems require both determinism and adaptability. Dynamically orchestrated hardware can improve
resiliency while supporting evolving mission requirements over extended lifecycles.

Toward the next era of computing
The transition from static silicon to adaptive systems represents more than an incremental improvement in semiconductor design. It signals the emergence of a new computing paradigm. For decades, the industry focused primarily on scaling transistor density and increasing raw performance. In the coming era, adaptability, orchestration, and energy efficiency will become equally important dimensions of compute architecture.

This transition cannot be solved by any single company or institution alone. It requires collaboration across the semiconductor ecosystem, including research institutions, system integrators, software developers, chip vendors, infrastructure providers, and industrial users. That collaborative ecosystem is precisely the kind of environment organizations such as INSIDE are helping to build.

The future of computing will not be defined solely by faster chips or smaller process nodes. It will increasingly be defined by
systems capable of adapting intelligently to changing workloads, operating conditions, and energy constraints in real time. In that transition, adaptive, software- defined hardware may become one of the foundational architectural shifts of the AI era.

Keith Shea
Co-Founder D-Chiplet AB
Stockholm, Sweden

Keith Shea, based in Stockholm, Sweden, is an entrepreneurial technology executive with extensive international leadership experience building, scaling, and operating global businesses at the intersection of artificial intelligence,
semiconductors, cloud software, and mission-critical systems. He has held senior executive roles across the United States and Europe, including more than two decades at Intel Corporation.

In addition to his operating roles, Keith serves on the boards of several commercial and non- profit organizations and is actively engaged in advising early-stage technology ventures. A native of Silicon Valley, he now resides in Europe with his family.

Keith holds a Bachelor’s degree in Economics from Boston College and an MBA from The Wharton School at the University of Pennsylvania